Contact to silicon carbide semiconductor device

ABSTRACT

In a silicon carbide semiconductor device in which a contact electrode is formed on a single-crystal silicon carbide semiconductor substrate, a barrier metal (titanium nitride layer) covers an interlayer insulating film in a region other than a contact hole, and a contact electrode of a predetermined electrode material is formed only in a region on the silicon carbide semiconductor substrate in the contact hole opened in the interlayer insulating film on the silicon carbide semiconductor substrate. A top of the barrier metal is covered by a metal electrode (wiring layer) and no nickel metal aggregates are present between the barrier metal and the metal electrode.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a division of copending U.S. application Ser. No.15/414,688, filed on Jan. 25, 2017. Furthermore, these applicationsclaim the benefit of priority of Japanese Patent Application No.2016-053117, filed on Mar. 16, 2016. The entire disclosures of theseprior U.S. and Japanese applications are incorporated herein byreference.

BACKGROUND OF THE INVENTION 1. Field of the Invention

Embodiments of the invention relate to a single-crystal silicon carbidesemiconductor device and particularly relate to high-voltage verticalsilicon carbide semiconductor device and a method of manufacturing asilicon carbide semiconductor device.

2. Description of the Related Art

Single-crystal silicon carbide has significantly higher breakdownelectric field strength and a wider bandgap than single-crystal siliconand realization of lower loss devices, or ultra-high breakdown voltagesemiconductor switching devices exceeding a breakdown voltage of 10 kVindividually are expected.

In the manufacturing process of a silicon carbide semiconductor device,when a contact (ohmic) electrode is formed on a front side of a wafer,the simplest method is to deposit a metal thin film and perform thermalannealing in an inert gas such as argon at about 1000 degrees C.Currently, nickel-based metals are typically used as a material for themetal (for example, refer to Saji, et al, “Interface physical propertiesof metal—SiC and its junction characteristics”, Papers of TechnicalMeeting on Electronic Materials, IEE Japan, EFM-90-20, 1990).

During thermal annealing, in a region in a contact hole in an interlayerinsulating film, silicon carbide and nickel are in direct contact witheach other whereby, the silicon included in the silicon carbide and thenickel react to form nickel silicide, becoming a low resistance contactelectrode.

Although the film thickness of the nickel is also dependent on theconcentration of the dopant included in the base silicon carbide and theconditions of the thermal annealing, in general, a film thickness ofabout 50 to 100 nm is sufficient. However, when nickel is deposited tohave a thickness within such a range, a low density state, i.e., a statein which “voids are formed” tends to occur easily. In this case, evenwhen attempts are made to form a contact electrode pattern only in thecontact hole, with wet etching, the side-etching amount of the nickellayer reaches several times the film thickness and control of thefinished dimension is difficult. Further, with dry etching, the etchingitself is extremely difficult.

To avoid such characteristics of nickel, as a means to form the contactelectrode pattern with good controllability only in the contact hole, aself-aligned process is effective. As a simple method, a resist patternused for contact hole formation is often reused as a mask whendepositing the nickel, i.e., a liftoff process (for example, refer toTanimoto, Satoshi, “Ohmic Contact Fabrication Technology for SiC PowerDevices”, The journal of the Surface Finishing Society of Japan, Vol.55, No. 1, p. 29 (2004)).

Meanwhile, when high process stability in mass production is demanded, amethod is used in which after the contact hole is formed and nickel isdeposited on the entire front side of the substrate followed by thermalannealing, sufficient nickel on the interlayer insulating film isremoved by chemical solution and the outermost surface of the interlayerinsulating film is again thinly etched (for example, refer to JapanesePatent No. 3888330).

SUMMARY OF THE INVENTION

A silicon carbide semiconductor device according to one aspect of thepresent invention includes a single-crystal silicon carbidesemiconductor substrate, an interlayer insulating film formed on thesilicon carbide semiconductor substrate, the interlayer insulating filmhaving a contact hole, a barrier metal layer formed on the interlayerinsulating film outside of the contact hole and on a side surface of thecontact hole, a contact electrode disposed on a bottom surface of thecontact hole, and a wiring layer covered over the barrier metal layer, aboundary between the barrier metal layer and the wiring layer being freeof aggregates of nickel metal.

In the silicon carbide semiconductor device, the contact electrode ismade of nickel silicide.

In the silicon carbide semiconductor device, the barrier metal is madeof a nitride containing one or more of titanium, zirconium, tantalum,and tungsten.

In the silicon carbide semiconductor device, the barrier metal has asurface roughness of 50 nm or less, said surface roughness being asurface roughness on a microscopic scale that excludes an effect ofdifferences in levels on a macroscopic scale originating in a surfacestructure of a gate electrode.

According to another aspect of the present invention, method ofmanufacturing a silicon carbide semiconductor device in which a contactelectrode is formed on a single-crystal silicon carbide semiconductorsubstrate, the method includes forming a contact hole in an interlayerinsulating film formed on the silicon carbide semiconductor substrate,forming a barrier metal layer on the interlayer insulating film outsideof the contact hole and on a side surface of the contact hole, formingan electrode layer of an electrode material on the barrier metal layerand a bottom portion of the contact hole, thermal annealing the siliconcarbide semiconductor substrate thereafter to form a contact electrodemade of a nickel silicide in the bottom portion of the contact hole andscatter nickel metal aggregates in a region other than the bottomportion of the contact hole, and immersing the silicon carbidesemiconductor substrate thereafter in a chemical solution in whichnickel is soluble to dissolve and remove the nickel metal aggregates.

In the method of manufacturing a silicon carbide semiconductor device,the chemical solution includes any of nitric acid, hydrochloric acid,and sulfuric acid.

Objects, features, and advantages of the present invention arespecifically set forth in or will become apparent from the followingdetailed description of the invention when read in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1, 2, 3, 4, and 5 are cross-sectional views of manufacturingprocesses of a silicon carbide semiconductor device according to anembodiment; and

FIG. 6 is a cross-sectional view depicting an example of a semiconductordevice having a planar MOS gate structure as an example of applicationof the present invention.

DETAILED DESCRIPTION OF THE INVENTION

An embodiment of the present invention will be described in detail withreference to the accompanying drawings. Herein, pure nickel is used asthe material of the contact electrode and titanium nitride is used asthe material of the barrier metal.

FIGS. 1, 2, 3, 4, and 5 are cross-sectional views of manufacturingprocesses of a silicon carbide semiconductor device according to theembodiment. FIGS. 1 to 5 show schematic diagrams of a surface structureformed on the n-type silicon carbide substrate 1, as viewed from across-sectional direction at each manufacturing process. Further, steps1 to step 5 correspond to the numbers of FIGS. 1 to 5, respectively.

<Step 1>

FIG. 1 depicts a state in which a device structure is formed on then-type silicon carbide substrate 1 and a contact hole 5 is formeddirectly on a high-concentration ion implantation region. As depicted inFIG. 1, on the single crystal n-type silicon carbide substrate 1 cleanedby a method such as chemical solution cleaning, plasma etching, etc.,after an n-type drift layer 2 and a high-concentration ion implantationregion 3 are sequentially formed and sealed by an interlayer insulatingfilm 4, the contact hole 5 is opened directly on the high-concentrationion implantation region 3. Techniques of pattern formation, maskalignment, etc. are obvious and description and depiction thereof willbe omitted.

<Step 2>

FIG. 2 depicts a state in which a titanium nitride layer 6 is formed onregions other than the contact hole 5, including side walls of thecontact hole 5. As depicted in FIG. 2, a region (including the surfaceof the interlayer insulating film 4) farther outward than the contacthole 5 and including the side walls of the contact hole 5 are protectedby the titanium nitride layer 6 suitable as a barrier metal. The regionin the contact hole 5 is opened by a technique such as dry etching andthe high-concentration ion implantation region 3 is exposed. Similar tostep 1, description and depiction of techniques of pattern formation,mask alignment, etc. are omitted herein. As the barrier metal, otherthan titanium, a nitride that includes one or more of zirconium,tantalum, and tungsten is assumed.

<Step 3>

FIG. 3 depicts a state in which a nickel layer 7 is deposited on theentire region of the surface structure. As depicted in FIG. 3, thenickel layer 7 is deposited on the entire region of the surfacestructure, including the surfaces of the contact hole 5 and the titaniumnitride layer 6. As a technique of depositing the nickel layer 7, vapordeposition, sputtering, etc. may be used; in particular, sputtering isexcellent for film thickness uniformity and is therefore, suitable. Asthe nickel layer 7, without limitation to pure nickel, for example, withan aim at suppressing the generation of free carbon, a nickel alloymixed with about 15 to 30 at % titanium may be used.

Although not depicted, in the case of a vertical-type semiconductorelement, since a contact electrode is also required on the substraterear surface side, similar to the front surface side, a metal such asnickel is also deposited on the rear surface side of the n-type siliconcarbide substrate 1 at this stage.

<Step 4>

The n-type silicon carbide substrate 1 having the surface structureformed up to step 3 is placed in an annealing furnace and thermalannealing is performed in an inert gas atmosphere such as argon,nitrogen, etc. Consequent to this annealing, inside the contact hole 5,the nickel layer 7 and the silicon included in the silicon carbidereact, forming a nickel silicide layer (contact electrode) 8.

Meanwhile, outside the contact hole 5, since the nickel layer 7 isseparated from the interlayer insulating film 4 by the titanium nitridelayer 6, a silicide is not formed. However, even when thermal annealingis performed at about 1000 degrees C., which is less than the actualmelting point (1455 degrees C.) of nickel, fluidization of the nickeloccurs directly on the titanium nitride layer 6 and the state changes toone in which nickel-containing metal aggregates 9 are scattered about.

FIG. 4 depicts a state in which thermal annealing is performed wherebythe nickel silicide layer 8 is formed inside the contact hole 5, and thenickel-containing metal aggregates 9 are scattered in regions other thanthe contact hole 5. As depicted in FIG. 4, although the size of thenickel-containing metal aggregates 9 varies to some extent depending onthermal annealing conditions, the presence of differences in levels on amacroscopic scale of the surface structure, etc., the nickel-containingmetal aggregates 9 have a granular shape having a long axis of about 200to 600 nm and a thickness of about 50 to 100 nm. Further, intervalsbetween aggregates are substantially the same as the long axes of theaggregates themselves.

<Step 5>

Next, after the thermal annealing, the n-type silicon carbide substrate1 is immersed in a chemical solution including one of nitric acid,hydrochloric acid, and sulfuric acid. Provided that the chemicalsolution is capable of dissolving nickel, no limitation is particularlyprovided other than the components above. However, from the perspectiveof common-use of the processing tank, a solution of phosphoricacid/nitric acid or phosphoric acid/nitric acid/acetic acid used inAl—Si alloy patterning is suitable.

FIG. 5 depicts a state directly after wet etching is performed using achemical solution including one of nitric acid, hydrochloric acid, andsulfuric acid and only nickel-containing metal aggregates are removed.As depicted in FIG. 5, by processing of immersing the n-type siliconcarbide substrate 1 in a chemical, the nickel silicide layer 8substantially does not react; however, the nickel-containing metalaggregates 9 existing directly on the titanium nitride layer 6 arepromptly dissolved and removed. As a result, the flatness on amicroscopic scale of the surface structure may be restored to the samelevel directly after the titanium nitride layer 6 is deposited at step2.

In a conventional contact electrode formation process, 1) a technique ofremoving residual nickel and the outermost layer of the interlayerinsulating film, after thermal annealing, or 2) a technique ofconcurrent use of a barrier metal such as titanium nitride is taken.Nonetheless, with the technique of 1), the interlayer insulating film 4cannot be made thin; and in the technique of 2), the nickel-containingmetal aggregates 9 are scattered on the barrier metal (the titaniumnitride layer 6) in large numbers. In either case, when an Al—Si alloyis deposited as a wiring layer (metal electrode), a problem arises inthat abnormal crystal grain growth and/or the generation of voids mayoccur.

On the contrary, in the contact electrode formation by the presentembodiment described above, a self-aligned process is realized whilesuppressing the thickness of the interlayer insulating film 4 and theremoval of the nickel-containing metal aggregates 9 to restore theflatness of the surface structure of the barrier metal becomes possible.

In FIG. 5, the nickel silicide layer 8 is formed on the silicon carbidesubstrate (the n-type drift layer 2) only in the contact hole 5. The topof the interlayer insulating film 4 is covered by a metal electrode 10of an Al—Si alloy or the like, via the titanium nitride layer 6.Furthermore, an electrode formed by nickel silicide is provided on thesilicon carbide substrate (the n-type drift layer 2) only at a regioninside the contact hole 5. In regions other than the contact hole 5,including the side walls of the contact hole 5, the interlayerinsulating film 4 is covered by a barrier metal (the titanium nitridelayer 6), a top of the barrier metal is covered by a metal electrode,and the nickel-containing metal aggregates 9 are not present between thebarrier metal and the metal electrode. That is, a boundary between thebarrier metal layer (titanium nitride layer 6) and the wiring layer 10is free of aggregates of nickel metal.

From the state depicted in FIG. 5 and thereafter, various elementstructures may be configured on the silicon carbide substrate 1 and inthe silicon carbide semiconductor device having these various elementstructures, the flatness of the surface structures on the barrier metalmay be maintained. As a result, for example, when an Al—Si alloy isdeposited on the barrier metal as a wiring layer (metal electrode) 10,the reliability of the semiconductor element may be improved without theoccurrence of abnormal crystal grain growth or the generation of voids.

FIG. 6 is a cross-sectional view depicting an example of a semiconductordevice having a planar MOS gate structure as an example of applicationof the present invention. The example depicted in FIG. 6 is avertical-type MOSFET in which an n-type epitaxial layer 32 is formed ona front surface of an n⁺-type silicon carbide substrate 31. An impurityconcentration of the n-type epitaxial layer 32 is lower than that of then⁺-type silicon carbide substrate 31. In the n-type epitaxial layer 32,plural p-type regions 36 are selectively formed. The p-type regions 36are exposed on an opposite side of the n-type epitaxial layer 32 withrespect to an n⁺-type silicon carbide substrate 31 side thereof.

Across the surfaces of the p-type regions 36 and the n-type epitaxiallayer 32, a p-type SiC layer 37 having a lower concentration than thep-type regions 36 is formed. In the p-type SiC layer 37 on the n-typeepitaxial layer 32 where the p-type regions 36 are not formed, an n-typeregion 33 is formed that passes through the p-type SiC layer 37 in adepth direction and reaches the n-type epitaxial layer 32. The n-typeepitaxial layer 32 and the n-type region 33 are an n-type drift region.An impurity concentration of the n-type region 33 may be preferablyhigher than the n-type epitaxial layer 32.

In the p-type SiC layer 37, an n⁺-type source region 34 and a p⁺-typecontact region 35 are formed so as to contact each other. The n⁺-typesource region 34 and the p⁺-type contact region 35 are exposed on anopposite side of the p-type SiC layer 37 with respect to a p-type region36 side thereof. The n⁺-type source region 34 is formed away from then-type region 33. The p⁺-type contact region 35 is positioned on anopposite side of the n⁺-type source region 34 with respect to an n-typeregion 33 side thereof. An impurity concentration of the p⁺-type contactregion 35 is higher than that of the p-type SiC layer 37.

Portions of the p-type SiC layer 37 excluding the n⁺-type source region34, the p⁺-type contact region 35, and the n-type region 33 form p-typebase regions together with the p-type regions 36. On the surfaces of then⁺-type source region 34 and the p⁺-type contact region 35, a sourceelectrode 38 is formed. A gate electrode 13 is formed on the surfaces ofthe p-type SiC layer 37 and the n-type region 33 between adjacentn⁺-type source regions 34, via a gate insulating film 12. The gateelectrode 13 is electrically insulated from the source electrode 38 by anon-depicted interlayer insulating film. Further, on a rear surface ofthe n⁺-type silicon carbide substrate 31, a drain electrode 39contacting the n⁺-type silicon carbide substrate 31 is formed.

In the semiconductor device having the planar MOS gate structuredepicted in FIG. 6, a contact hole is formed in the source electrode 38portion formed of Ni, etc. contacting the n⁺-type source region 34 andthe p⁺-type contact region 35, and the interlayer insulating film isprovided on a side portion of the source electrode 38. Further, inregions other than the contact hole, including the side walls of thecontact hole, an interlayer insulating film is covered by a barriermetal (the titanium nitride layer 6), a top of the barrier metal iscovered by a metal electrode, and the nickel-containing metal aggregates9 are not present between the barrier metal and the metal electrode.

In addition to vertical-type MOSFET element structures, the presentinvention is similarly applicable to various types of semiconductordevices such as horizontal-type MOSFETs and the like.

According to the embodiment, after an ohmic junction is formed on asilicon carbide substrate by thermal annealing, the silicon carbidesubstrate is immersed in a chemical solution of phosphoric acid/nitricacid/acetic acid or the like, and nickel-containing metal aggregatesremaining on the barrier metal are removed. Here, the nickel-containingmetal aggregates alone may be removed, without the nickel silicideformed inside the contact hole dissolving in the chemical solutionabove. As a result, with the contact electrode remaining as is, theflatness of the surface structure may be restored.

However, when the interlayer insulating film is thin, the reactionamount with nickel is no longer negligible and in the worst case, anabnormality (spike phenomenon) occurs where the nickel penetratesthrough to the silicon carbide region. Therefore, when suppressing thethickness of the interlayer insulating film to a constant value or lessis difficult and unevenness of a gate electrode, etc. is present in anelement structure, a tendency for differences in levels on a macroscopicscale (roughly, a height of 300 nm more) of the interlayer insulatingfilm to become accentuated is unavoidable. When an Al—Si alloy or thelike is deposited as a wiring layer, such a difference in levels bringsabout abnormal crystal grain growth and the generation of voids, relatedto decreased reliability of the semiconductor element.

On the contrary, in preventing the spike phenomenon above whilesuppressing the thickness of the interlayer insulating film, concurrentuse of a barrier metal such as titanium nitride and the like iseffective. Concerning this point, the inventor actually tried to producean element structure and even when the annealing temperature was lessthan the actual melting point (1455 degrees C.) of nickel,nickel-containing metal that could not react with the silicon carbide inthe contact hole became fluidized directly on the barrier metal.

When the fluidization of the nickel-containing metal is scattered acrossthe entire region on the barrier metal, countless grain-shapedaggregates having a long axis of about 200 to 600 nm and a thickness ofabout 50 to 100 nm are generated and the flatness of the surfacestructure degrades. Further, a new problem was confirmed in that when anAl—Si alloy or the like is deposited as a wiring layer, abnormal crystalgrain growth and/or the generation of voids is brought about andreliability of the semiconductor element decreases.

This problem is thought to be caused by the nickel placed in ahigh-temperature environment taking in titanium included in the barriermetal whereby melting-point depression occurs. Further, when thenickel-containing metal aggregates are scattered across the entireregion on the barrier metal, in addition to the differences in levels ona macroscopic scale, the flatness of on a microscopic scale (roughly, aheight of about 100 nm or less) degrades and when an Al—Si alloy or thelike is deposited, abnormal crystal grain growth and/or the generationof voids results.

According to the present invention, after an ohmic junction is formed bythermal annealing on a silicon carbide substrate, the silicon carbidesubstrate is immersed in a chemical solution of phosphoric acid/nitricacid/acetic acid, and nickel-containing metal aggregates remaining onthe barrier metal are removed. Here, the nickel-containing metalaggregates alone may be removed, without the nickel silicide formedinside the contact hole dissolving in the chemical solution above. As aresult, with the contact electrode remaining as is, the flatness of thesurface structure may be restored.

According to the present invention, no fine aggregates of nickel arepresent on the barrier metal and the flatness of the barrier metal maybe improved.

As described, the silicon carbide semiconductor device and the method ofmanufacturing a silicon carbide semiconductor device according to thepresent invention are useful for silicon carbide semiconductor devicesthat use silicon carbide as a semiconductor material.

Although the invention has been described with respect to a specificembodiment for a complete and clear disclosure, the appended claims arenot to be thus limited but are to be construed as embodying allmodifications and alternative constructions that may occur to oneskilled in the art which fairly fall within the basic teaching hereinset forth.

What is claimed is:
 1. A method of manufacturing a silicon carbidesemiconductor device in which a contact electrode is formed on asingle-crystal silicon carbide semiconductor substrate, the methodcomprising: forming a contact hole in an interlayer insulating filmformed on the silicon carbide semiconductor substrate; forming a barriermetal layer on the interlayer insulating film outside of the contacthole and on a side surface of the contact hole; forming an electrodelayer of an electrode material on the entirety of an upper surface ofthe barrier metal layer and on a bottom portion of the contact hole, soas to make the electrode layer directly contact the silicon carbidesemiconductor substrate; thermal annealing the silicon carbidesemiconductor substrate with the electrode layer formed on the barriermetal layer, thereafter to form a contact electrode made of a nickelsilicide in the bottom portion of the contact hole and scatter nickelmetal aggregates in a region other than the bottom portion of thecontact hole; and immersing the silicon carbide semiconductor substratethereafter in a chemical solution in which nickel is soluble to dissolveand remove the nickel metal aggregates.
 2. The method of manufacturing asilicon carbide semiconductor device according to claim 1, wherein thechemical solution includes any of nitric acid, hydrochloric acid, andsulfuric acid.
 3. The method of manufacturing a silicon carbidesemiconductor device according to claim 1, wherein the electrode layeris comprised of pure nickel or an alloy containing nickel.
 4. The methodof manufacturing a silicon carbide semiconductor device according toclaim 1, wherein the barrier metal layer is comprised of a nitridecontaining one or more of titanium, zirconium, tantalum, and tungsten.5. The method of manufacturing a silicon carbide semiconductor deviceaccording to claim 1, wherein the method further comprising forming anAl—Si alloy on the barrier metal layer as a wiring layer.
 6. The methodof manufacturing a silicon carbide semiconductor device according toclaim 1, wherein the method further comprising forming a back sideelectrode layer of the electrode material on the back side of thesilicon carbide semiconductor substrate when the electrode layer isformed.
 7. The method of manufacturing a silicon carbide semiconductordevice according to claim 1, wherein the nickel metal aggregates has along axis in a range of 200 to 600 nm and a thickness in a range of 50to 100 nm.